Recently, sigma-delta, or noise-shaping, mixed-signal converters have come into widespread use. This type of converter uses a relatively coarse quantizer, usually a single bit, embedded in a feedback loop. The feedback loop causes the large quantization noise of the quantizer to become shaped in the frequency domain such that the noise over a small range of the spectrum is very low. The out-of-band noise is then removed by a digital filter in the case of an analog-to-digital converter, or an analog filter in the case of a digital-to-analog converter. Sigma-delta converters exhibit excellent linearity and low quantization noise.
An important feature exploited by noise-shaping mixed-signal converters is oversampling of the signal. This provides bandwidth into which the quantization noise can be transferred, and subsequently filtered, if desired. This procedure improves the resolution of the digital representation of the signal, but only within a relatively small signal bandwidth compared with the sampling frequency. Because these converters are typically designed to have a very high input resolution (often 20 or more bits, or one part in 1E+6) within their bandwidth specification, they are susceptible to imperfections, mismatch among circuit elements and thermal noise. Therefore, techniques that relax the design tolerances on specific electronic components are useful.
One of the primary obstacles in the design of noise-shaping mixed-signal converters is the problem of removing the large amount of out-of-band noise that is introduced by the digital modulator. Generally, this noise may be filtered, but the switched capacitor filter circuits typically used to accomplish this task are relatively expensive to build and may introduce nonlinear distortions. An alternative is to use multi-bit quantization, in which the digital word consists of more than a single bit. This approach can reduce the quantization noise directly.
An important element in multi-bit noise-shaping mixed-signal converters is the digital-to-analog converter (DAC) circuitry. In multi-bit digital-to-analog (D/A) converters, the DAC structure forms the desired output, whereas in multi-bit analog-to-digital (A/D) converters, the DAC constitutes an important element in the feedback loop. Typically, the DAC structure is configured by using a number N of nominally identical elements, each of which is a 1-bit DAC and provides a unit contribution (either 0 or 1) to a summing junction. The summed output forms the multi-bit DAC output.
Because of actual circuit nonidealities, such as mismatches between capacitors in an array of N capacitors in a switched capacitor array, the beneficial effects of the multi-bit feedback are lost due to the inherent nonlinearity caused by the mismatch. This nonlinearity directly leads to increased quantization noise and harmonic distortion within the signal bandwidth and can significantly degrade the performance of the converter.
A number of methods have been proposed and implemented for counteracting the effects of such mismatches. Many of these methods involve a form of randomization or rotation of the bits that specify which of the individual DACs are to be selected and which are to be deselected in a given clock cycle in an effort to even out, or to average, mismatches. Examples are disclosed in L. R. Carley, “A Noise-Shaping Coder Topology for 15+ Bit Converters,” IEEE J. Solid State Circuits, SC-24, No. 2, pages 267–273, Apr. 1989; U.S. Pat. No. 5,406,283 issued Apr. 11, 1995 to Leung; and U.S. Pat. No. 5,856,799 issued Jan. 5, 1999 to Hamasaki et al. The main drawback of the disclosed methods is that they typically require many clock cycles to achieve the desired averaging, especially when the number of elements is large. This results in low frequency noise and may thereby degrade the performance in the passband of the converter.
U.S. Pat. No. 5,986,595 issued Nov. 16, 1999 to Lyden et al. attempts to address this problem by replacing the rotations with a more sophisticated sorting procedure that requires extra complexity in the circuitry. U.S. Pat. No. 5,684,482 issued Nov. 4, 1997 to Galton extends these ideas to handle the case of increased shaping order, but at the cost of introducing more complex switching logic as well as a nonlocal memory, which can be costly to implement in circuit layout. Moreover, Galton's method works only for the case where the number of elements is equal to an integer power of 2.
U.S. Pat. No. 5,404,142 issued Apr. 4, 1995 to Adams et al. discloses a data-directed scrambling technique that relieves the burden of tight analog component matching. The quantized noise-shaped word is first converted to a “thermometer code”, where for an R-bit quantized word, 2R equally-weighted elements are used. In the thermometer code, the number of output bits set to one is equal to the input value. The fact that the output bits are equally-weighted allows dynamic mapping of digital input bits to analog elements of the digital-to-analog converter. By using an array of swapping elements whose state is controlled by the data itself, errors caused by analog mismatches can be manipulated, thereby shaping the noise in the output spectrum. Therefore, most of the noise energy is outside the band of interest.
In the technique disclosed by Adams et al., each of the switching units, called a “2×2 swapper cell,” has two inputs and two outputs, and these units are arranged in a “butterfly architecture” similar to one commonly used in Fast Fourier Transform (FFT) algorithms. To further reduce the pattern tones, a randomizing pre-shifter can be used, as in the AD1853, a stereo multi-bit sigma-delta DAC sold by Analog Devices, Inc. The advantages of this method include its simple logic, which is local, and requires only 1-bit memories, and its efficiency: only (N/2) log2 N switching units are required for a thermometer encoder with N input levels. However, one restriction of this method is that it works only when the bits of the input data word are equally-weighted.
A copending application filed Feb. 8, 2002 and entitled “Data-Directed Scrambler For Noise-Shaping Mixed-Signal Converters With An Arbitrary Number Of Quantization Levels”, attorney's docket number A0312/7421, discloses a scrambling technique that can be used for an arbitrary number of input levels. However, the disclosed method is also restricted to equally-weighted input digital signals.
Accordingly, it is desirable to provide scrambling methods and apparatus for noise-shaping mixed-signal converters wherein one or more of the above drawbacks are overcome. It is also desirable to provide efficient scrambling methods and apparatus for equally-weighted input codes.